hardware instruction
英 [ˈhɑːdweə(r) ɪnˈstrʌkʃn]
美 [ˈhɑːrdwer ɪnˈstrʌkʃn]
网络 硬体的指令; 硬件指令
双语例句
- The cloud environment is constructed with software and hardware components chosen by the team; however, the article contains knowledge and instruction that can be used regardless of technologies you choose.
该团队使用选定的软件与硬件组件构建这个云环境；然而，无论您选择何种技术，都能用到本文包含的知识与说明。 - Constructing infrastructure, which includes developing both hardware of computer network and basic teaching platform, is the primary condition for developing distance instruction.
开展远程教学的首要条件就是基础设施的建设。这既包括计算机网络硬件的建设，也包括基础的教学平台建设。 - Based on the study and analysis of the DAISY and the Crusoe ( tm), a hardware oriented model for dynamic instruction translation is proposed.
文章在研究分析DAISY和Cruseo（tm）这两款处理器后，针对X86指令集系统提出一种全硬件的动态翻译模型。 - The co verification environment consists of an embedded software debugger and an embedded hardware simulator. It adopts instruction set architecture co simulation model.
该协同验证环境由嵌入式软件调试器和嵌入式硬件模拟器组成，其采用了指令集结构的协同模拟模型。 - High performance approach with both hardware feasibility and software effectiveness for solving instruction interlock problem is given.
最后，给出了一种兼顾硬件可行性与软件有效性的解决指令互锁的高性能方案。 - Hardware Resource Optimization Technique of SOPC Based on Instruction Statistics of Application Program
基于指令统计的SOPC硬件资源优化技术 - To introduce the function of operation interface of welding wire layer winder, system hardware composing and part idiographic circuit. The direction instruction and show instruction of FX series for key control design and part program are given out.
介绍焊丝层绕机操作界面的功能、系统硬件组成及部分具体电路，给出部分程序和键控设计需要使用FX系列的方向指令和显示指令。 - The paper introduces the installation? file configuration and hardware simulation logic structure of instruction level simulator.
介绍指令级模拟器SkyEye及安装、文件配置、硬件模拟逻辑结构。 - A Hardware Oriented Model for Dynamic Instruction Translation
一种全硬件动态指令翻译模型 - The digital signal processor becomes the preferred utility for realizing digital arithmetic rapidly and precisely relying on its particular hardware and instruction architecture.
而DSP（数字信号处理器）以其特有的硬件体系结构和指令体系成为快速精确实现数字信号处理算法的首选工具。 - Based on the design of demultiplexing and parsing procedure of MPEG-2 tranSPort stream, this paper presents the hardware/ software co-design of the embedded RISC core, especially for the limited instruction cache size.
本文以符合ATSC标准的MPEG－2TS流解复用和系统信息解码为算法对象，研究在片上指令缓存有限的情况下设计嵌入式RISC核时，系统层解码的软／硬件协同设计。 - A software/ hardware interface model based on ARM ( advanced reduced instruction set computer machine) kernel CPU ( central processing unit) is designed. The definition of hardware interface, as well as the implementation of software interface is presented in detail.
设计了一种基于高级精简指令集处理器核处理器的无线通信系统接口模型，叙述了硬件接口的定义及相应软件接口模块的实现。 - The hardware architecture and instruction set of the digital signal processor leads to its high speed and precision in processing data.
数字信号处理器的硬件结构和指令体系决定了它在实现各种算法时具有速度快、精度高的特点。 - Hardware Stack Design for Loop Instruction Optimization
一种为循环指令优化的硬件栈设计 - The chapter 4 cany on the research to the hardware which based on CAN bus, consisting of pressure acquisition module, instruction acquisition module, data processing module and power module of system.
第四章对状态监测系统硬件进行了设计，系统基于CAN总线构建，主要功能模块包括：压力采集模块、制动机工况采集模块、数据处理模块以及状态监测系统的供电设计等。 - This paper also summarizes the relationship between the function of water distribution control system, structure of hardware, software pro-gramming, type of control instruction, application of variable speed pumps, and overall control system.
本文还就配水控制系统的功能、硬件结构、软件编制、控制指令形式、变速泵的应用以及配水控制系统与总合管理系统的关系等问题作了概要介绍。 - This paper has introduced a method of the software and hardware of the multi-medium computer aid instruction system.
介绍了一种计算机辅助多媒体考试系统的软、硬件设计方案。 - Some software and hardware anti-jamming method was applied to the recorder such as instruction redundancy, software trap, electromagnetic shield and appropriate grounding etc.
该记录器采用指令冗余、软件陷阱和电磁屏蔽、合理接地等抗干扰技术。 - Combining the merits of software and hardware techniques together, dynamic VLIW ( Very Long Instruction Word) architecture is one of current computer architecture researching trends which have potentially high performance.
动态VLIW（verylonginstructionword，超长指令字）结构兼具软硬件ILP开发技术的优点，是具有良好性能潜力和发展前景的计算机体系结构技术方向之一。 - Next, the detail hardware of extended instruction is given.
其次，该文给出了部分扩展指令的具体硬件结构。 - With consideration of the working principle and functions of the AVC system, the possibility of causing an abnormal generator outage by the AVC system is analyzed and eliminated. The possibility includes misadjustment, hardware faults, and adjustment instruction mistakes.
通过一起发电机非正常停机事件，联系AVC系统的原理及功能，分析并排除了在这次非正常停机事件中，AVC系统可能引起停机的各种可能性（包括误调节、硬件故障及调节指令错误等）。 - Sensors as forward access obtain signal, an industrial computer with abundant hardware resource as background utilize set-in boards based on PCI bus and serial modules to fulfill data transmission and instruction communication.
传感器作为前向通道拾取各信号，后台以工业控制计算机丰富的硬件资源为基础，利用基于PCI高速总线的插卡式测量板卡和串口模块实现与计算机的数据传输和命令通讯。 - But in reality, the upper software drives the underlying hardware, for example different instruction execution and data access affect the underlying hardware circuit directly and result in different power generation.
但在实际情况中，底层硬件受上层软件驱动，例如不同指令执行和数据存取等软件指令直接影响底层硬件的电路活动，导致不同功耗产生。 - Power analysis attacks are different from the traditional attacking mode. They can recover the secret keys stored in cryptographic hardware devices by analyzing the input and output data combining with cross-correlation between the operation instruction and the power consumption during the cipher processing.
功耗分析攻击突破传统密码算法的攻击模式，利用密码硬件设备工作过程中所产生的功耗与操作指令的相关性，结合输入和输出数据进行分析，获取电路内部保存的密钥。 - To address this problem, this paper proposed a method based on hardware and software co-design technology to design and implement an application specific instruction processor to promote the efficiency of the RSA algorithm.
针对这个问题，本文采用了一种基于软硬件协同设计技术的专用指令处理器的的设计和实现方法，来加速RSA算法的运行效率。 - For the hardware part, after a instruction of the whole design, the design of several chief circuits and practical electronic circuit is presented.
硬件部分包括控制器的整体设计，及几个主要模块的电路设计方法并给出实际电路。 - In TTA, software specifies data transports among function units ( FUs), so application specific hardware can support more sophisticated FUs, and the problems about instruction generation and retargetable compiling can be solved at the same time.
TTA中，软件所见为功能单元（FU）之间的数据传输，故硬件设计可以支持寄存器文件分割以及定制更多更复杂的FU，同时解决了指令集生成、可重定向编译等问题。 - Multithreaded microprocessor, which has many hardware contexts sharing an execution core, can efficiently exploit both the instruction level parallelism and thread level parallelism to acquire higher performance and better performance/ power ratio.
多份硬件现场共享一组执行单元的多线程处理器能灵活地利用程序中的指令级并行和线程级并行，从而提供更好的性能。 - The method made use of hardware dynamic instruction schedule technique which applied both instruction level parallelism and thread level parallelism to improve the parallel computation performance. 3.
该方法利用硬件动态指令调度技术，同时采用指令级并行和线程级并行，提高并行运算的性能。 - We design the reusing-hardware and the rules for parallel use of the hardware by instructions, which are all based on ingenerate ILPs of the instruction set.
在设计中，本文仔细考察了指令的并行性，并以此为根据设计了相应的硬件并行使用规则和硬件复用方案，可以有效降低系统的静态功耗。